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| JBT6L78-AS TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic JBT6L78-AS Gate Driver for TFT LCD Panel The JBT6L78-AS is a 162-channel output gate driver for TFT LCD panels. This device accepts external input of the panel drive voltage, allowing you to change the low-level output voltage. Thus, the can be used for various TFT LCD panel drive systems. The JBT6L78-AS offers high integration circuit due to CMOS technology. Features * * * * LCD drive output pins Data transfer method Operating temperature : 162 pins : Bidirectional shift registers : -20 to 75C LCD drive output voltage : VEE + 36 V (max) 1 2001-12-21 JBT6L78-AS Block Diagram DO/I DI/O TEST1 TEST2 CPV U/D Input circuit block Bidirectional shift registers OE1 OE2 OE3 Control circuit block VOFF Output circuit block VGG VDD VSS VCC VEE G1 G2 G3 G160 G161 G162 2 2001-12-21 JBT6L78-AS PAD Layout Chip size: 1.09 11.51 (mm) Chip center (0,0) DUMMY DUMMY DUMMY DUMMY VGG Alignment mark VEE VOFF VDD TEG CPV VDD U/D VSS OE3 OE2 OE1 TEG VSS VCC VGG Alignment mark DUMMY DUMMY DUMMY DUMMY 6 6 6 6 10 2 2 2 2 2 2 2 10 6 6 6 Long-side Output PAD 40 40 Long-side Input PAD 65 80 20 65 Short-side PAD 100 50 50 Alignment mark 90 Pattern prohibited 90 30 30 30 30 30 30 90 24.5 50 90 90 90 90 3 G2 G1 DI/O DI/O DUMMY DUMMY Unit: mm DUMMY DUMMY DO/I DO/I G162 G161 2001-12-21 JBT6L78-AS PAD Coordinates Chip size: 11.51 1.09 (mm) Number of PAD: 254 [Unit: mm] No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 Name VGG VGG VGG VGG VGG VGG VEE VEE VEE VEE VEE VEE VOFF VOFF VOFF VOFF VOFF VOFF VDD VDD VDD VDD VDD VDD TEG TEG TEG TEG TEG TEG TEG TEG TEG TEG CPV CPV VDD VDD X Point -5328 -5243 -5158 -5073 -4988 -4903 -4618 -4533 -4448 -4363 -4278 -4193 -3908 -3823 -3738 -3653 -3568 -3483 -3198 -3113 -3028 -2943 -2858 -2773 -2488 -2348 -2208 -2068 -1928 -1788 -1648 -1508 -1368 -1228 -943 -858 -573 -488 Y Point -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 No. 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 Name U/D U/D VSS VSS OE3 OE3 OE2 OE2 OE1 OE1 TEST1 TEST2 TEG TEG TEG TEG TEG TEG TEG TEG VSS VSS VSS VSS VSS VSS VCC VCC VCC VCC VCC VCC VGG VGG VGG VGG VGG VGG X Point -203 -118 167 252 537 622 907 992 1277 1362 1647 1932 2217 2357 2497 2637 2777 2917 3057 3197 3482 3567 3652 3737 3822 3907 4192 4277 4362 4447 4532 4617 4902 4987 5072 5157 5242 5327 Y Point -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 -420 No. 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 Name DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DI/O DI/O G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 G20 G21 G22 G23 G24 G25 G26 G27 G28 G29 G30 X Point 5620 5620 5620 5620 5450.5 5386 5321.5 5257 5192.5 5128 5063.5 4999 4934.5 4870 4805.5 4741 4676.5 4612 4547.5 4483 4418.5 4354 4289.5 4225 4160.5 4096 4031.5 3967 3902.5 3838 3773.5 3709 3644.5 3580 3515.5 3451 3386.5 3322 Y Point -147 -47 53 153 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 4 2001-12-21 JBT6L78-AS [Unit: mm] No. 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 Name G31 G32 G33 G34 G35 G36 G37 G38 G39 G40 G41 G42 G43 G44 G45 G46 G47 G48 G49 G50 G51 G52 G53 G54 G55 G56 G57 G58 G59 G60 G61 G62 G63 G64 G65 G66 G67 G68 G69 G70 G71 X Point 3257.5 3193 3128.5 3064 2999.5 2935 2870.5 2806 2741.5 2677 2612.5 2548 2483.5 2419 2354.5 2290 2225.5 2161 2096.5 2032 1967.5 1903 1838.5 1774 1709.5 1645 1580.5 1516 1451.5 1387 1322.5 1258 1193.5 1129 1064.5 1000 935.5 871 806.5 742 677.5 Y Point 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 No. 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 Name G72 G73 G74 G75 G76 G77 G78 G79 G80 G81 G82 G83 G84 G85 G86 G87 G88 G89 G90 G91 G92 G93 G94 G95 G96 G97 G98 G99 G100 G101 G102 G103 G104 G105 G106 G107 G108 G109 G110 G111 G112 X Point 613 548.5 484 419.5 355 290.5 226 161.5 97 32.5 -32 -96.5 -161 -225.5 -290 -354.5 -419 -483.5 -548 -612.5 -677 -741.5 -806 -870.5 -935 -999.5 -1064 -1128.5 -1193 -1257.5 -1322 -1386.5 -1451 -1515.5 -1580 -1644.5 -1709 -1773.5 -1838 -1902.5 -1967 Y Point 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 No. 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 Name G113 G114 G115 G116 G117 G118 G119 G120 G121 G122 G123 G124 G125 G126 G127 G128 G129 G130 G131 G132 G133 G134 G135 G136 G137 G138 G139 G140 G141 G142 G143 G144 G145 G146 G147 G148 G149 G150 G151 G152 G153 X Point -2031.5 -2096 -2160.5 -2225 -2289.5 -2354 -2418.5 -2483 -2547.5 -2612 -2676.5 -2741 -2805.5 -2870 -2934.5 -2999 -3063.5 -3128 -3192.5 -3257 -3321.5 -3386 -3450.5 -3515 -3579.5 -3644 -3708.5 -3773 -3837.5 -3902 -3966.5 -4031 -4095.5 -4160 -4224.5 -4289 -4353.5 -4418 -4482.5 -4547 -4611.5 Y Point 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 415 5 2001-12-21 JBT6L78-AS [Unit: mm] No. 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 3/4 3/4 Name G154 G155 G156 G157 G158 G159 G160 G161 G162 DO/I DO/I DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY Alignment mark Alignment mark X Point -4676 -4740.5 -4805 -4869.5 -4934 -4998.5 -5063 -5127.5 -5192 -5256.5 -5321 -5385.5 -5450 -5620 -5620 -5620 -5620 5543 -5543 Y Point 415 415 415 415 415 415 415 415 415 415 415 415 415 153 53 -47 -147 -333 -333 6 2001-12-21 JBT6L78-AS Pin Description Pin Name I/O Function Vertical shift data input/output pins Input/output shift data. The pin function is switched between input and output by the U/D pin as follows: U/D DI/O I/O DO/I H L DI/O Input Output DO/I Output Input At input Data are latched into the shift registers in sync with the rising edge of CPV. At output: If the JBT6L78-AS is cascade-connected, data to be input at the next stage are output from the pin. The data state changes in sync with the falling edge of CPV. Data transfer direction switching pin Specifies the shift direction of the shift registers. Data in the shift registers shift in sync with the rising edge of CPV as follows: * U/D = H: G1 (R) G2(R) G3 (R) ... (R) G162 * U/D = L: G162 (R) G161(R) G160 (R) ... (R) G1 Use the pin at DC level. For High, VDD; for Low, VSS. Note that if U/D mode is switched during data transfer, misoperation occurs to a display page. Vertical shift clock Shift clock for the shift registers. Data are shifted in sync with the rising edge of CPV. Output enable pin These pins control output data from the output pins (G1 to G162). * OE = L: Normal output state (1-pulse scanning) * OE = H: Outputs VOFF voltage. Note that the contents of the shift registers are not cleared. Those operations are performed asynchronously to CPV. LCD panel drive pins. Test pin. Leave the pin open. Power supply pin for controlling LCD. LCD off level input pin Power supply pin for internal logic Power supply pin for cascade output Power supply pin for LCD control and internal logic Power supply pin for controlling LCD U/D I CPV I OE1 to OE3 I G1 to G162 TEST1, TEST2, O I TEG VGG VOFF VDD VSS VCC VEE 7 2001-12-21 JBT6L78-AS Timing Chart UP mode (U/D = High level) DI/O (Input) 1 CPV 2 3 4 5 161 162 163 164 165 OE1 OE2 OE3 G1 G2 G3 G4 G162 DO/I (Output) 8 2001-12-21 JBT6L78-AS DOWN mode (U/D = Low level) DO/I (Input) 1 CPV 2 3 4 5 161 162 163 164 165 OE1 OE2 OE3 G162 G161 G160 G159 G1 DI/O (Output) 9 2001-12-21 JBT6L78-AS Maximum Ratings (VSS = 0 V) Characteristics Supply voltage (1) Supply voltage (2) Supply voltage (3) Supply voltage (4) Input voltage LCD off level input voltage Storage temperature Symbol VGG - VEE VEE VDD VCC - VEE VIN VOFF Tstg Rating -0.3 to 45.0 -20 to 0.3 -0.3 to 6.5 -0.3 to 6.5 -0.3 to VDD + 0.3 VEE - 0.3 to VGG + 0.3 -55 to 125 Unit V V V V V V C Operating Range (VSS = 0 V) Characteristics Supply voltage (1) Supply voltage (2) Supply voltage (3) Supply voltage (4) Input voltage LCD OFF level input voltage Operating temperature Operating frequency Output load capacitance Symbol VGG - VEE VEE VDD VCC - VEE VIN VOFF Topr fCPV CL Rating 20 to 36 -18 to -5 2.5 to 3.6 3.0 to 5.5 0 to VDD VEE to VEE + 8 -20 to 75 DC to 50 100 (max) Unit V V V V V V C kHz pF Relations between power supplies VGG VDD VSS VOFF VCC VEE Internal logic Cascade input Cascade output LCD drive output 10 2001-12-21 JBT6L78-AS Electrical Characteristics DC Characteristics VDD = 2.5 to 3.6 V, VGG - VEE = 20 to 33 V, VOFF = VEE to VEE + 5 V, VCC = VEE + 5 V, VSS = 0 V, Ta = -20 to 75C Characteristics Low level Input voltage High level Low level Output voltage High level Input leakage current Output resistance ROH Current dissipation (1) Current dissipation (2) Current dissipation (3) Current dissipation (4) Current dissipation (5) IGG IDD ICC IOFF IEE 3/4 3/4 3/4 3/4 3/4 3/4 (Note 2) VGG level output 3/4 3/4 3/4 3/4 -400 3/4 3/4 3/4 3/4 3/4 50 500 80 40 3/4 mA mA mA mA mA VIH VOL VOH IIN ROL 3/4 3/4 3/4 3/4 3/4 IOL = 100 mA IOH = -100 mA 3/4 VOFF level output 3/4 Symbol VIL Test Circuit 3/4 Test Condition 3/4 Min 0 VDD 0.8 3/4 VDD 0.4 3/4 3/4 Typ. 3/4 3/4 3/4 3/4 3/4 3/4 Max VDD 0.2 VDD 0.4 V 3/4 1.0 1.0 mA kW G1 to G162 DI/O, DO/I Unit Relevant Pin (Note 1) V Note 1: DI/O, DO/I, CPV, OE1 to OE3 Note 2: No load, CPV = 21 kHz, DI/O input cycle = 60 Hz, VDD = 3.6 V, VEE = -15 V, CPV High width = 23.8 ms, 1-clock cycle DI/O input, OE1 to OE3 = Low, U/D = High AC Characteristics VDD = 2.5 to 3.6 V, VGG - VEE = 20 to 33 V, VOFF = VEE to VEE + 5 V, VCC = VEE + 5 V, VSS = 0 V, Ta = -20 to 75C Symbol tCPVH tCPVL tsDI thDI tpdDO tpdG tpdOE Test Circuit 3/4 3/4 3/4 3/4 3/4 3/4 3/4 CL = 20 pF CL = 100 pF CL = 100 pF Test Condition 3/4 3/4 3/4 3/4 Characteristics Clock pulse width (H) Clock pulse width (L) Data setup time Data hold time Output delay time (1) Output delay time (2) Output delay time (3) Min 10 10 1 1 3/4 3/4 3/4 Max 3/4 3/4 3/4 3/4 1 2 2 Unit ms ms ms ms ms ms ms 11 2001-12-21 JBT6L78-AS tCPVL 80 20 tsDI DI/O, DO/I (input) 80 thDI 80 80 tCPVH 80 CPV 20 CPV 80 80 tpdG VGG level G1 to G162 VOFF level 50 tpdG 50 CPV 20 tpdDO 20 tpdDO DO/I, DI/O (output) 50 50 80 OE1 to OE3 tpdOE 20 tpdOE VGG level G1 to G162 50 50 VOFF level 12 2001-12-21 JBT6L78-AS Power Supply Sequence At power on, supply power in order of VDD (R) logic signal (R) VCC, VEE, VOFF (R) VGG. At power off, turn off in order of VGG (R) VCC, VEE, VOFF (R) logic signal (R) VDD. VGG VDD VSS = 0 V VCC VEE/VOFF 13 2001-12-21 JBT6L78-AS RESTRICTIONS ON PRODUCT USE 000707EBM * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * Light striking a semiconductor device generates electromotive force due to photoelectric effects. In some cases this can cause the device to malfunction. This is especially true for devices in which the surface (back), or side of the chip is exposed. When designing circuits, make sure that devices are protected against incident light from external sources. Exposure to light both during regular operation and during inspection must be taken into account. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice. 14 2001-12-21 |
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